This application is based on Japanese patent application HEI 10-176737 filed on Jun. 9, 1998, the whole contents of which are incorporated herein by reference.
a) Field of the Invention
The present invention relates to a synchronous signal detection circuit for detecting a synchronous signal from a video signal.
b) Description of the Related Art
A conventional horizontal synchronous signal detection circuit uses a phase-locked loop (PLL) circuit in order to detect a horizontal synchronous signal from a video signal (composite image signal). A horizontal synchronous signal detection circuit which processes an analog video signal uses an analog PLL circuit, and a horizontal synchronous signal detection circuit which processes a digital video signal uses a digital PLL circuit.
FIG. 5 is a chart showing waveforms illustrating detection of a horizontal synchronous signal. Synchronization detection is executed by using horizontal synchronous signals HSS and equalizing pulses EP during the vertical blanking period VBP and horizontal synchronous signals during the horizontal blanking period.
FIG. 6 shows more specific waveforms of a reception signal. Waveform distortion such as corrupted waveforms appears on the horizontal synchronous signals and equalizing pulses during the vertical blanking period.
In order to detect a horizontal synchronous signal without being influenced by such waveform distortion, an analog PLL circuit having a large time constant is used to suppress the waveform distortion.
An analog PLL circuit having a large time constant requires a capacitor having a large capacitance, resulting in a bulky circuit. An analog PLL circuit is susceptible to a variation in component characteristics similar to a general analog circuit, resulting in a degraded manufacture yield, an increase in the number of inspection steps, and a high cost.
A digital PLL circuit does not use horizontal synchronous signals and equalizes pulses having a large waveform distortion during the vertical blanking period by masking them, in order to detect synchronization. Although a horizontal synchronous signal detection circuit using a digital PLL circuit is inexpensive, its operation is not stable.
In a conventional digital PLL circuit, masking and synchronization detection are performed based upon whether there is waveform distortion in horizontal synchronous signals and equalizing pulses during the vertical blanking period. However, if the horizontal synchronous signals inserted in the image signal during the horizontal blanking period have waveform distortion, the masking cannot be executed The reason why the masking cannot be executed for the horizontal synchronous signals in an image signal during the horizontal blanking period results from the principle of PLL. From the principle of PLL, masking is impossible during the horizontal blanking period.
If the horizontal synchronization fluctuates in the image signal, the digital PLL circuit is locked into (synchronized with) this fluctuation. Until the next vertical blanking period, horizontal synchronization with high precision is impossible and the operation becomes unstable.
A horizontal synchronous signal detected by a digital PLL circuit is divided in frequency by this circuit to generate sampling clocks of an image signal. In order to generate the sampling clocks, the digital PLL is required to be operated from a timing several H periods (H is one horizontal scan period) before the end of the horizontal blanking period. However, if horizontal synchronous signals and equalizing pulses during these several H periods have waveform distortion, a PLL lock is delayed so that correct sampling clocks cannot be generated before the horizontal blanking period is terminated. As a result, an image reproduced on a display may be distorted or a portion of a reproduced image is lost.
It is an object of the present invention to provide synchronous signal detecting techniques capable of masking incorrect synchronous signals.
According to one aspect of the present invention, there is provided a synchronous signal detection circuit comprising:a synchronous signal separation circuit for separating a synchronous signal from a video signal; a circuit for generating a window signal in accordance with the separated synchronous signal, the window signal designating a period during which following synchronous signals are anticipated; and a gate for passing the synchronous signal only during the period designated by the window signal.
According to another aspect of the present invention, there is provided a horizontal synchronous signal detection circuit for detecting a horizontal synchronous signal from a separated horizontal synchronous signal obtained through synchronous signal separation of a video signal, the circuit comprising:a window signal generator circuit for generating a window signal having an open-period and a close-period;a switch circuit for passing the separated horizontal synchronous signal during the open-period of the window signal and intercepting the separated horizontal synchronous signal during the close-period of the window signal; and an oscillator for generating a rate signal having a period equal to a horizontal scan period synchronously with a change in an output signal from the switch circuit, and adjusting a time duration of the open period of the window signal so as to make a timing of a change in the output signal coincide with a generation timing of the rate signal while the open-period of the window signal is synchronized with the generation timing of the rate signal, wherein the output signal is used as a horizontal synchronous signal.
The rate signal is generated synchronously with a change in an output signal from the switch circuit. The open-period of the window signal is set synchronously with the generation timing of the rate signal having a period equal to a horizontal scan period. The time duration of the open-period is adjusted so as to make the timing of a change in the output signal coincide with the generation timing of the rate signal. The correct horizontal synchronous signal in the separated horizontal synchronous signal is output from the switch circuit. This output signal is used as the horizontal synchronous signal so that the horizontal synchronous signal can be detected at high precision.
As above, the rate signal having the period equal to the horizontal scan period is generated, and horizontal synchronous signal detection is executed during the open-period of the window signal synchronizing with the generation timing of the rate signal. The rate signal is generated synchronously with a change in the signal output from the switch circuit during the open-period. The time duration of the open-period of the window signal is adjusted so as to make the timing of a change in the output signal coincide with the generation timing of the rate signal. It is possible to detect the correct horizontal synchronous signal during the open-period of the window signal. Even if noises generated by waveform distortion enter the horizontal synchronous signal, the horizontal synchronous signal detection can be executed quickly if a correct horizontal synchronous signal is generated after the noises disappear.